In recent years, particularly in the field of mobile communications mainly through cellular phones, the need for higher functionality has increased as well as the size reduction and slimming down of semiconductor devices for communications. Conventionally, a plurality of semiconductor elements have been used to configure a circuit on the substrate of a cellular phone. Thus there is a growing demand for advanced modules in which a plurality of semiconductor elements are stored in a single package and chip passive components such as a chip capacitor and a chip inductor are mounted in the package to provide a self-contained circuit and function in a device as circuit formation between the semiconductor elements.
For example, in PA modules for GSM cellular phones, a signal package includes a plurality of semiconductor elements corresponding to triple bands serving as usable frequency bands and includes a number of chip passive components such as a chip capacitor and a chip inductor for a circuit configuration between the elements, resulting in a complicated configuration (for example, see Japanese Patent Laid-Open No. 2006-041401).
A conventional semiconductor device will now be described in accordance with the accompanying drawings.
FIG. 9 is a sectional view showing the configuration of the conventional semiconductor device. In the conventional semiconductor device of FIG. 9, a circuit pattern 17 is formed on a resin substrate 91 which includes stacked thin plates of resin and has a diameter of 8 mm and a thickness of 1.5 mm. On the circuit pattern 17, a semiconductor element 93 and chip passive components 9 in 0603 size are mounted. Particularly, the chip passive components 9 are fixed on the resin substrate 91 by electrically connecting the chip passive components 9 to the circuit pattern 17 with solder 18. Further, the overall surface of the resin substrate 91 is molded and covered with epoxy resin 10, and solder electrodes 5 for external connection are formed on the underside of the resin substrate 91.
In the conventional semiconductor device of FIG. 9, the solder electrodes 5 for external connection are mounted on the underside of the resin substrate 91, the semiconductor element 93 and the chip passive components 9 are mounted on the top surface of the resin substrate 91, and the top surface of the resin substrate 91 is entirely molded with resin. This configuration increases both of the lateral dimensions and thickness dimensions of the semiconductor device, increasing the size of the overall device.
Further, the resin substrate 91 used as the substrate of the device increases the self weight of the overall semiconductor device and the deformations of the solder electrodes 5 for external connection. Thus a large spacing is necessary between the adjacent solder electrodes 5, increasing the size of the overall device.
Moreover, in this configuration, the semiconductor element 93 and the chip passive components 9 on the resin substrate 91 are only molded with resin. Thus it is not possible to obtain an electromagnetic shielding effect when the operating frequency is a high frequency of at least several hundreds MHz, causing a problem in obtaining the operational stability of the semiconductor device.
Another problem is how to dissipate heat from the semiconductor device when the heat is liberated during the operation of the semiconductor device as in a power semiconductor. Further, the use of the resin substrate 91 inevitably increases the manufacturing cost including the material cost.
Generally, in power amplifier circuits for amplifying high frequencies, it is necessary to set a large inductance value on a power supply line to prevent amplified power from leaking to a power supply side and perform high efficiency operations. An inductance component with such a large value formed on a surface of the semiconductor device causes a large chip size and inevitably increases the manufacturing cost including the material cost.
Further, when a plurality of inductance components are formed on a surface of a semiconductor device, the chip area is increased and it is difficult to obtain high-frequency isolation between the components, resulting in higher manufacturing cost and a deterioration of high frequency characteristics.